Authors: | F. Pavanello, E. Vatajelu, A. Bossio, T. Van Vaerenbergh, P. Bienstman, B. Charbonnier, A. Carpegna, S. Di Carlo, A. Savino | Title: | Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies | Format: | International Conference Proceedings | Publication date: | 4/2023 | Journal/Conference/Book: | IEEE VLSI Test Symposium (VTS)
| Editor/Publisher: | IEEE, | Volume(Issue): | p.10 | Location: | San Diego, United States | DOI: | 10.1109/VTS56346.2023.10139932 | Citations: | 2 (Dimensions.ai - last update: 19/1/2025) Look up on Google Scholar
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