G. Jo, P. Edinger, S. Bleiker, X. Wang, A.Y.Takabayashi, H. Sattari, N. Quack, M. Jezzini, P. Verheyen, G. Stemme, W. Bogaerts, K.B. Gylfason, F. Niklaus
Title:
Wafer-level vacuum sealing for packaging of silicon photonic MEMS
9 (Dimensions.ai - last update: 17/11/2024) 7 (OpenCitations - last update: 27/6/2024) Look up on Google Scholar
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Abstract
We demonstrate the first wafer-level hermetic vacuum packaging of Si photonic MEMS with optical and electrical feedthroughs. Si photonic MEMS is emerging as a unique technology for large-scale reconfigurable photonics. Hermetic vacuum packaging is critical to the performance and longevity, and to protect from contamination. However, there are no existing wafer-level packaging methods that
provide hermetic vacuum packaging with optical and electrical feedthroughs for Si photonic MEMS. The packaging method consists of sealing the photonic devices with 25 µm-thin Si caps. We illustrate the effectiveness of our solution by packaging wafers produced in the iSiPP50G Si photonics platform of IMEC.
